Dynamic bias control

ABSTRACT

Systems and methods for controlling a power amplifier includes combining a digital modulated data signal with a digital bias signal to generate a combined digital signal, the digital bias signal generated based on an envelope for the modulated data signal; converting, by a digital-to-analog converter, the combined digital signal into a combined analog signal, the combined analog signal comprising an analog modulated data signal and an analog envelope bias signal; and separating the analog modulated data signal and the analog bias signal onto separate signal paths, wherein the converting is performed using a single digital-to-analog converter.

TECHNICAL FIELD

The disclosed technology relates generally to satellite communications,and more particularly, some embodiments relate to improved signalprocessing techniques for satellite signals.

DESCRIPTION OF THE RELATED ART

Continued advances in wireless communications have brought about adramatic increase in the proliferation of cellular telephones, tabletsand other portable electronic devices for the communication of media,messages and other data among various users. Such devices are notlimited to accessing media content and other data via mobile networks,but instead are able to connect using multiple networks, such as forexample, WiFi networks (e.g., IEEE 802.11™, promulgated by the Instituteof Electrical and Electronics Engineers, Inc., 3 Park Avenue, New York,N.Y. 10016-5997, USA), other IEEE 802® networks, Bluetooth® networks,and others.

Consider WiFi applications as an example. Typically, WiFi-enabledcellular telephones are able to exchange media content, messages andother data via either a cellular network (e.g., 3G, 4G, 4GLTE, etc.) aWiFi or the like. Accordingly, users can leverage wireless access pointsto access the Internet, an available intranet or other network. As aresult of this available connectivity, the relatively high data ratesoffered by WiFi standards, and the increasing costs of cellular data,WiFi access points have become ubiquitous in contemporary homes,offices, businesses, and in public places as well.

FIG. 1 is a diagram illustrating an example network such as a WiFinetwork. In the example shown in FIG. 1, a number of wireless devices 53having at least a WiFi-compatible interface are shown. Althoughillustrated as wireless handsets, wireless devices 53 can includecellular or satellite telephones and other handsets, tablets, PDAs,portable computing devices, desktop computing devices, and other devicesand equipment having wireless communication capability. Also shown inthe example of FIG. 1 are a plurality of wireless routers 51. In termsof the WiFi example, wireless routers 51 may be implemented as WiFirouters compatible with one or more of the IEEE 802.11 standards. Insome environments, a network controller 52 can be included to managemultiple wireless routers 51 and their communications with an intranet59 or the outside world. In the example shown in FIG. 1, wirelessrouters 51 are connected to the Internet 55 by way of an Internetservice provider 52.

In order to enable wireless network communications, wireless devices 53in the network and wireless routers 51 may include a communicationsystem configured in accordance with the designated standard. Forexample, the transceivers can include baseband processing, acommunication transceiver and a front-end amplifier. FIG. 2 is a diagramillustrating an example implementation of a conventional communicationsystem that can be used for wireless communications such as, forexample, WiFi or other wireless communications. The example of FIG. 2includes a baseband module 220, a narrowband transceiver 230, atransmit/receive module module 236 and an antenna. Transmit/receivemodule module 236 includes a power amplifier PA to amplify the transmitsignal for transmission and a low noise amplifier LNA. Preferably, thelow noise amplifier is located as close to the signal source (e.g., theantenna) as possible to avoid amplifying additionally introduce noise.

Also shown in the example of FIG. 2 is a transmit/receive switch 238 toswitch between the transmit and receive modes. When in the transmitmode, signals from the power amplifier PA are routed to the antenna.When in the receive mode, signals from the antenna are routed to the lownoise amplifier LNA. In a time division duplex (TDD) system, thetransceiver is configured alternately in either the transmit or receivemode.

Baseband module 220 includes a baseband DSP 222 and a plurality ofanalog-to-digital converters (ADC) and a digital-to-analog converters(DAC). In most conventional configurations, the interface to thebaseband module 220 is an analog interface, and communications on the Iand Q channels between baseband module 220 and narrowband transceiver230 are in the form of analog signals. For transmit operations, data forthe land Q channels is processed digitally using baseband DSP 222. Thisdigital data is converted to analog form using digital-to-analogconverters (DACs) and transmitted across the analog interface 224 to thetransceiver 230. For receive operations, the analog signals received bythe system are converted to digital information by the analog-to-digitalconverters (ADCs) for baseband processing at baseband digital signalprocessor 222.

Narrowband transceiver 230 includes a transmit chain and a receivechain. On the transmit side, analog signals in the form of the I and Qchannels are received and modulated onto a carrier, or a converted, fortransmission. One or more variable gain amplifiers can be included toprovide gain control for the analog signals. Also, low pass filters(LPFs) can be used to filter out unwanted noise outside of the frequencyband. The I and Q channels are combined and provided to the poweramplifier PA for amplification and subsequent transmission. On thereceive side, the amplified signal from the low noise amplifier LNA isdownconverted in one or more stages to, for example, a zero IF signal.The downconverted signal on the I and Q channels is provided to basebandmodule 220 for processing. The receive side can also include low passfilters (LPFs) which remove unwanted noise, and variable gain amplifiersto provide appropriate signal levels.

FIG. 3 is a diagram illustrating another example of a communicationtransceiver. This example is that of a 4×4 MIMO transceiver such as canbe used, for example, in WiFi or in other communication applications.This example essentially includes the architecture of FIG. 2 replicatedfour times, one for each MIMO transceiver. As this illustrates, thisarchitecture leads to a high-density configuration and includes ananalog interface between baseband module 220, and transceivers 230 witha total of 16 signals across the interface.

BRIEF SUMMARY OF EMBODIMENTS

According to various embodiments of the disclosed technology systems andmethods may be provided in which a communication system may include: adigital tuner having an input and an output, the digital tunerconfigured to output a modulated data signal; an envelope computationmodule having an input and an output, and configured to provide a biassignal at its output; a combiner having a first input coupled to theoutput of the digital tuner and a second input coupled to the output ofthe envelope computation module, and an output, the combiner configuredto generate a combined signal by combining the modulated data signalwith the bias signal; a DAC having an input coupled to the output of thecombiner and an output; a power amplifier having a signal input, acontrol input and an output; a high pass filter having an input coupledto the output of the DAC and an output coupled to the signal input ofthe power amplifier; and a low pass filter having an input coupled tothe output of the DAC and an output coupled to the control input of thepower amplifier.

In various embodiments, the high pass filter may be configured to filterout the bias signal from the combined signal and to pass the modulateddata signal to the input of the power amplifier for amplification. Infurther embodiments, the low pass filter may be configured to filter outthe modulated data signal from the combined signal and to pass the biassignal to the control input of the power amplifier to control the biasof the power amplifier. The bias signal and the modulated data signalmay be sufficiently separated from one another in frequency so as to notdestructively interfere with one another upon being combined by thecombiner. In various embodiments, a single DAC may be used to convertthe modulated data signal and the bias signal into an analog combinedsignal.

In some embodiments, the envelope computation module may be configuredto compute a complement of the envelope. In further embodiments, theenvelope computation module computes the complement of the envelope toreduce the digital-to-analog converter's dynamic range requirements.

Embodiments may include a modulator having an output coupled to theinput of the digital tuner. Some embodiments may include an adaptivefilter coupled between the envelope computation module and the combiner.The adaptive filter may include an input coupled to the output of theenvelope computation module and an output coupled to the second input ofthe combiner.

A return path may be provided and coupled to an input of the adaptivefilter to provide signal information to train the adaptive filter. Theadaptive filter may be configured to measure signal distortion andprovide pre-distortion for the communication system. A bias conditionermay be included to extract an original envelope for the modulated datasignal to ensure that the analog bias signal may be substantially inphase with the analog modulated data signal at the power amplifier.

A method for controlling a power amplifier may include combining adigital modulated data signal with a digital bias signal to generate acombined digital signal, the digital bias signal generated based on anenvelope for the modulated data signal; converting, by adigital-to-analog converter, the combined digital signal into a combinedanalog signal, the combined analog signal including an analog modulateddata signal and an analog envelope bias signal; and separating theanalog modulated data signal and the analog bias signal onto separatesignal paths. In some embodiments, the converting may be performed usinga single digital-to-analog converter.

Separating may include filtering out the analog bias signal from thecombined analog signal and passing the analog modulated data signal to apower amplifier for amplification. Separating may further includefiltering out the analog modulated data signal from the analog combinedsignal and passing the analog bias signal to a control input of a poweramplifier to control the bias of the power amplifier.

Embodiments may include filtering, using an adaptive filter, the digitalbias signal prior to combining it with the digital modulated datasignal. Embodiments may include extracting the original envelope for themodulated data signal to ensure that the analog bias signal may besubstantially in phase with the analog modulated data signal at thepower amplifier. The the analog modulated data signal may be provided toan input of a power amplifier, and the analog bias signal may beprovided to a control input of the power amplifier.

In other embodiments, a power amplifier is included for amplifying theanalog modulated data signal, wherein the power amplifier may becontrolled by the analog bias signal. The amplified modulated datasignal may be transmitted, for example, via an antenna. Embodiments mayinclude measuring signal distortion of the signal to providepre-distortion of the signal.

Other features and aspects of the disclosed technology will becomeapparent from the following detailed description, taken in conjunctionwith the accompanying drawings, which illustrate, by way of example, thefeatures in accordance with embodiments of the disclosed technology. Thesummary is not intended to limit the scope of any inventions describedherein, which are defined solely by the claims attached hereto.

BRIEF DESCRIPTION OF THE DRAWINGS

The technology disclosed herein, in accordance with one or more variousembodiments, is described in detail with reference to the followingfigures. The drawings are provided for purposes of illustration only andmerely depict typical or example embodiments of the disclosedtechnology. These drawings are provided to facilitate the reader'sunderstanding of the disclosed technology and shall not be consideredlimiting of the breadth, scope, or applicability thereof. It should benoted that for clarity and ease of illustration these drawings are notnecessarily made to scale.

FIG. 1 is a diagram illustrating a wireless network having multiplewireless routers.

FIG. 2 is a diagram illustrating an example implementation of an analogtransceiver interfacing to a baseband module.

FIG. 3 is a diagram illustrating another example of a communicationtransceiver interfacing to a baseband module.

FIG. 4 is a diagram illustrating one example of a communication systemusing digital tuning in accordance with one embodiment of the systemsand methods disclosed herein.

FIG. 5 is a diagram illustrating one example of a communication systemhaving a digital broadband transceiver in accordance with one embodimentof the technology disclosed herein.

FIG. 6 is a diagram illustrating one example of shared analog-to-digitaland digital-to-analog converters in accordance with one embodiment ofthe technology disclosed herein.

FIG. 7 is an operational flow diagram illustrating an example processfor implementing the transceiver interface for transmitter operations inaccordance with one embodiment of the technology disclosed herein.

FIG. 8 is a diagram illustrating an example process for receiveoperations in accordance with one embodiment of the technology disclosedherein.

FIG. 9 is a diagram illustrating an example implementation for a holdcircuit in accordance with one embodiment of the technology disclosedherein.

FIG. 10 is a diagram illustrating an example of an implementation of ashared ADC/DAC interface in an exemplary 4×4 MIMO configuration inaccordance with one embodiment of the technology disclosed herein.

FIG. 11 is a diagram illustrating another example of sharedanalog-to-digital and digital-to-analog converters in accordance withone embodiment of the technology disclosed herein.

FIG. 12 is a diagram illustrating an example of dynamic biasing inaccordance with one embodiment of the technology described herein.

FIG. 13 is a diagram illustrating another example of dynamic biasing inaccordance with one embodiment of the technology described herein.

FIG. 14 is a diagram illustrating yet another example of dynamic biasingin accordance with one embodiment of the technology described herein. Inthis example, an adaptive filter is included to equalize the envelopebias signal with the RF signal.

The figures are not intended to be exhaustive or to limit the inventionto the precise form disclosed. It should be understood that theinvention can be practiced with modification and alteration, and thatthe disclosed technology be limited only by the claims and theequivalents thereof.

DETAILED DESCRIPTION OF THE EMBODIMENTS

In accordance with various embodiments, a wireless communication systemcan be implemented in which one or more analog-to-digital converters andone or more digital-to-analog converters can be shared by variouscommunication paths. Embodiments of a communication transceiver can beimplemented using digital tuners and other digital signal processingblocks that can be interfaced to a baseband module having an analoginterface without requiring analog-to-digital converters ordigital-to-analog converters dedicated to that interface. In someembodiments, conventional tuning functions such as modulation,demodulation, and filtering can be performed in the digital domain andthe analog-to-digital and digital-to-analog converters used by thetransceiver for the interface with the PA/LNA block (i.e,transmit/receive module) can be switched to also provide the analoginterface to the baseband module. In other embodiments, digitalinterfaces between the communication transceiver and the baseband modulecan be provided.

FIG. 4 is a diagram illustrating one example of a communication systemusing digital tuning in accordance with one embodiment of the systemsand methods disclosed herein. In the example of FIG. 4, thecommunication system includes a baseband module 320, a transceiver 330(e.g., a broadband transceiver), and a transmit/receive module 340.Baseband module 320 includes baseband circuitry 322 and a plurality ofdigital-to-analog converters 324 and analog-to-digital converters 326.Baseband circuitry 322 can be implemented, for example, using one ormore digital signal processors with suitable program code to perform thebaseband data processing. Digital-to-analog converters 324 andanalog-to-digital converters 326 provide an analog interface 329 betweenbaseband module 320 and transceiver 330 (which may be a broadbandtransceiver). As seen in this example, the I and Q channels for thetransmit and receive functions are sent using separate signal paths eachwith a dedicated pair of analog-to-digital and digital-to-analogconverters.

Digital tuners 333 can include circuitry to provide the transmit andreceive tuning functions for the transceiver. For example, digitaltuners 333 can include bandpass filtering to eliminate noise, modulationfor modulating the baseband data onto a carrier for transmission (e.g.,2.4 GHz or 5 GHz in the case of WiFi), demodulating the received datafor conversion to I/F or baseband, and other like tuner functions.Digital tuners 333 can be implemented using digital circuitry or one ormore digital signal processors running program code configured toperform the transceiver operations. Digital-to-analog converter 338 canbe provided to convert the digital signal to analog form fortransmission across a wireless network. Likewise, analog-to-digitalconverter 339 can be provided to accept received analog signals andconvert them to digital form for digital demodulation and filtering.

Transmit/receive module 340 provides amplification of the transmit andreceive signals. A power amplifier 342 is included to amplify themodulated signal for transmission over the wireless interface. A lownoise amplifier 344 is provided to amplify the received signals tosufficient levels to enable proper reception of the signal. Low noiseamplifier 344 is ideally provided as close to the source as possible tominimize the amount of noise amplified by the LNA.

FIG. 5 is a diagram illustrating one example of a communication systemhaving a digital broadband transceiver in accordance with one embodimentof the technology disclosed herein. In this example, baseband module 360is provided to perform the baseband processing and data handling fortransmitted and received data. Baseband module 360 in this exampleincludes baseband circuitry 362 and a serializer/deserializer 364(SerDes). Baseband circuitry 362 can be implemented, for example, usingone or more digital signal processors with suitable program code toperform the baseband data processing. Serializer/deserializer 364 can beimplemented to allow communication of the I and Q channels for transmitand receive data across a serial communication link. This can minimizethe number of physical interfaces between baseband module 360 andbroadband transceiver 370. This also allows a digital interface betweenbaseband module 360 and broadband transceiver 370 thereby obviating theneed for ADCs and DACs (analog-to-digital and digital-to-analogconverters) to support an analog interface between the two. This can becontrasted to the example of FIG. 4, which uses digital-to-analogconverters 324, 334 and analog-to-digital converters 326, 336 to providethe analog interface.

In the example of FIG. 5, broadband transceiver 370 includes aserializer/deserializer 366 (SerDes), digital tuners 368, adigital-to-analog converter 37 and analog-to-digital converter 374.Serializer/deserializer 366 provides a digital interface betweenbroadband transceiver 370 and baseband module 360.Serializer/deserializer 366 may be implemented in much the same way asSerializer/deserializer 364.

Digital tuners 368 can include circuitry to provide the transmit andreceive tuning functions for the transceiver. Digital tuners 368 can beimplemented using digital circuitry or one or more digital signalprocessors running program code configured to perform the transceiveroperations. For example, digital tuners 368 can include bandpassfiltering to eliminate noise, modulation for modulating the basebanddata onto a carrier for transmission (e.g., 2.4 GHz or 5 GHz in the caseof WiFi), demodulation for demodulating the received data for conversionto I/F or baseband, and other like tuner functions. Digital-to-analogconverter 372 can be provided to convert the digital signal to analogform for transmission across a wireless network. Likewise,analog-to-digital converter 374 can be provided to accept receivedanalog signals and convert them to digital form for digitaldownconversion and filtering.

Transmit/receive module 380 provides amplification of the transmit andreceive signals. A power amplifier 382 is included to amplify themodulated signal for transmission over the wireless interface. A lownoise amplifier 384 is provided to amplify the received signals tosufficient levels to enable proper reception of the signal. Low noiseamplifier 384 is ideally provided as close to the source as possible orpractical to minimize the amount of noise amplified by the LNA.

The example communication systems shown in FIGS. 4 and 5 are illustratedin these examples as time division duplexing (TDD) communication systemsin which transmit and receive operations are separated in time. Theexample communication systems shown in FIGS. 4 and 5 can be implementedfor any of a number of different wireless devices communicating via anyof a number of different wireless protocols. For example, thesecommunication systems can be implemented for WiFi or other IEEE 802wireless standards, satellite communications equipment, Bluetoothcommunications equipment, and so on. While the example illustrated inFIG. 5 allows a digital interface between the baseband module and thetransceiver, the transceiver may not provide direct compatibility withcommercially available baseband processing modules having analoginterfaces. The example shown in FIG. 4 does not have this interfaceincompatibility because the transceiver includes analog-to-digital anddigital-to-analog converters that provide the analog interface forcompatibility with readily available baseband modules including ananalog interface. However, the number of analog-to-digital anddigital-to-analog converters required for such an implementation cangrow quite large. This can be especially true in embodiments in which anumber of different communication paths are provided such as is the casewith MIMO applications. For example, consider the 4×4 MIMO applicationof FIG. 3 but with a digital tuning session such as that shown in FIG.4. As one can see, this application would require that the transceiverinclude 16 ADC/DAC converters to implement the interface to the basebandsection, and an 8×8 MIMO would require as many as 32 ADC/DAC converters.

Accordingly, various embodiments can be implemented to provide systemsand methods for sharing the digital-to-analog and analog-to-digitalconverters to provide a more efficient interface. Particularly, in someembodiments, switching and multiplexing circuitry can be provided toallow the digital-to-analog and analog-to-digital converters at theinterface between the broadband transceiver and the transmit/receivemodule module can be shared for use with the interface between thebroadband transceiver and the baseband section. This can lead to theelimination of a certain amount of mixed-signal circuitry (e.g., ADCsand DACs) in the transceiver. An example of this is now described.

FIG. 6 is a diagram illustrating one example of shared analog-to-digitaland digital-to-analog converters in accordance with one embodiment ofthe technology disclosed herein. In the example illustrated in FIG. 6,the communication system includes a baseband module 420, which includesbaseband circuitry 422, analog-to-digital converters 424 anddigital-to-analog converters 426. In some embodiments, baseband module420 can be implemented using a baseband module and correspondingcomponents the same as or similar to baseband module 320 of FIG. 4. Asseen in this example, baseband module 420 includes an analog interface429 for the I and Q channels for both the transmit and receive signals.

Broadband transceiver 430 in this example is implemented to providecompatibility with analog interface 429 while providing digital tunersin a digital tuning module 434. It can be seen in this example that onlyone digital-to-analog converter 437 and one analog-to-digital converter438 are required to provide analog communications across analoginterface 429. The same digital-to-analog converter 437 and oneanalog-to-digital converter 438 can be used to provide analogcommunications across analog interface 439. In this example, this isaccomplished by providing switching mechanisms and cross connections toallow digital-to-analog converter 437 and analog-to-digital converter438 to be shared for use with analog interface 429 and with analoginterface 439. These switching mechanisms may include switches 441, 442,which can be configured to switch the input of analog-to-digitalconverter 438 and the output of digital-to-analog converter 437depending on whether the communication system is in transmit or receivemode. These switching mechanisms may also include cross connectionsprovided to switch the appropriate signals (i.e., switch the signal pathfrom analog-to-digital converter 438 to the appropriate digital tunerfor modulation or demodulation, as required; and to switch the signalpath from the appropriate digital tuner for modulation or demodulationto digital-to-analog converter 437). Also provided in this example aredemultiplexer 432, multiplexer 433 and sample and hold module 431. Thesecomponents are described in more detail below.

As with the example embodiments described above, the digital tuningmodule 434 can be configured to provide modulation, demodulation andfiltering for the transmit and receive signals. In some embodiments,direct conversion between RF and baseband signals can be provided bydigital tuning module 434. The digital tuner circuitry, which can beimplemented, at least in part, using digital signal processing, can alsoinclude cross connection circuitry to allow sharing of digital-to-analogconverter 437 and analog-to-digital converter 438.

transmit, receive module 450 includes a power amplifier 455 to amplifythe transmit signal for communication across the wireless interface, anda low noise amplifier 454 to amplify the received RF signal. Switch 456switches the antenna signal between the transmitter and the receiverelements for TDD operations.

For transmit operations, analog signals for the I and Q channels arereceived from baseband module 420 at multiplexer 433. Multiplexer 433multiplexes the I and Q channels into a common signal path, and thecombined signal is routed to analog-to-digital converter 438. In thetransmit mode, switch 442 is positioned to communicatively couple(directly or indirectly (with intervening components) electricallyconnect) multiplexer 433 with analog-to-digital converter 438 forconversion to a digital data stream. The digitized transmit data fromanalog-to-digital converter 438 is passed to the digital tuners and thecross connection circuitry. The cross connection circuitry routes theoutput of the analog-to-digital converter to the transmit portion of thedigital tuners for modulation onto a carrier. In this embodiment, thisis done in the digital domain. The modulated data stream is routed bythe cross connection circuitry to digital-to-analog converter 437 whereis converted to an analog signal. Switch 441 is positioned tocommunicatively couple the output of digital-to-analog converter 437 tothe transmit side of transmit/receive module 450. Particularly, thesignal is routed to the power amplifier 455 and switched by switch 456to the antenna for transmission.

For receive operations, switches 441, 442, and 456 are placed in thepositions as shown in FIG. 6 such that RF signals received by theantenna can be routed to low noise amplifier 454 and then routed toanalog-to-digital converter 438. The received, digitized RF signals arerouted by the cross connection circuitry to the receive portion ofdigital tuning module 434 where they can be downconverted to baseband orzero-IF signals. In some embodiments, direct conversion can be employedto downconvert the signal directly to baseband without the need toconvert to an intermediate IF signal.

The downconverted signal is routed by the cross connection circuitry todigital-to-analog converter 437 where it is converted to an analogsignal and routed to sample and hold module 431. Demultiplexer 432demultiplexes the analog received signal into separate I and Q channels.After one of the I and Q channel signals is clocked into sample and holdmodule 431, it is held (e.g., in memory, a holding capacitor or otherstorage) while the other one of the I in Q channel signals is clockedin. Then, both the I and the Q channels can be released to basebandmodule 420 at the same time (sufficiently in sync to allow properreception by baseband module 420).

FIG. 7 is an operational flow diagram illustrating one example processfor implementing the transceiver interface for transmitter operations inaccordance with one embodiment of the technology disclosed herein.Referring now to FIGS. 6 & 7, at operation 502, switches 456, 441 and442 are set to the transmit mode (which is the opposite setting of thatillustrated for those switches in the example of FIG. 6). Thiscommunicatively couples (directly or indirectly) the output ofdigital-to-analog converter 437 with the input of power amplifier 455,the output of power amplifier 455 to the feed of the antenna, and theoutput of multiplexer 433 to the input of analog-to-digital converter438.

At operation 504, baseband module 420 generates or provides the basebandsignal for transmission. At operation 506, this data is converted toanalog data by digital-to-analog converters 426 and sent by basebandmodule 420 to broadband transceiver 430 via analog interface 429 andsent across analog interface 429. At operation 508, the I and Q channelsignals are multiplexed onto a single communication path and routed toanalog-to-digital converter 438 (via switch 442) where they aredigitized. For example, multiplexer 433 can be configured to multiplexor interleave the I and Q channels into a single analog stream. Atoperation 510, this digitized data is routed to digital tuners indigital tuning module 434 and digitally modulated onto the designatedcarrier. At operation 512, the modulated data is converted to analogdata via digital-to-analog converter 437 and routed via switch 441 topower amplifier 455 at operation 514. The amplified signal is routed viaswitch 456 for transmission by the antenna at operation 516.

Having thus described an example of the transmit operations, an exampleof the receive operations is now described. FIG. 8 is a diagramillustrating an example process for receive operations in accordancewith one embodiment of the technology disclosed herein. With referencenow to FIGS. 6 and 8, at operation 602, switches 456, 441, and 442, areplaced in their receive configurations. In one embodiment, these are theconfigurations as shown in FIG. 6, in which switch 456 communicativelycouples the antenna to low noise amplifier 454, low noise amplifier 454to analog-to-digital converter 438, and digital-to-analog converter 437to demultiplexer 432. At operation 604, transmitted signals are receivedby the antenna and routed to the low noise amplifier 454 via switch 456.Low noise amplifier 454 receives the received signal and amplifies it toappropriate levels for the receiver of broadband transceiver 430.

At operation 606, the amplified data from the low noise amplifier isrouted to analog-to-digital converter 438 via switch 442.Analog-to-digital converter 438 digitizes the signal so it can beprocessed by digital tuners in digital tuning module 434. The digitizeddata is routed to the digital tuners via cross connection circuitry. Atoperation 608, a receive section of digital tuning module 434 recoversthe I and Q channels and down converts the received data. As notedabove, in some embodiments this can be a direct downconversion (e.g., tozero IF). The I and Q channels are converted to analog signals usingdigital-to-analog converter 437. This is illustrated as operation 610.This analog signal is routed via switch 441 to demultiplexer 432. Atoperation 612, demultiplexer 432 demultiplexes the I and Q channels ontoseparate signal paths and holds the first of the two until the other oneis ready to be provided to baseband module 420. Then, at operation 614,the I and Q signals are sent at the same time to the baseband module420. At operation 616, the analog I and Q channels are digitized usinganalog-to-digital converters 424 such that they can be processed bybaseband module 420.

As these examples illustrate, embodiments can be implemented for boththe transmit and receive operations in which a communication transceivercan interface with an analog baseband module and a PA/LNA block using asingle digital-to-analog converter and a single analog-to-digitalconverter for a given communication channel.

As noted above, in the example embodiment of FIG. 6, a hold circuit isprovided to allow the I and Q channel signals to be sent to the basebandmodule at the same time (at least sufficiently simultaneous to allowproper receipt and processing by the baseband module). FIG. 9 is adiagram illustrating an example implementation for a hold circuit inaccordance with one embodiment of the technology disclosed herein. Asdescribed above, receive signals are digitized and down converted torecover the data using digital tuners. Digital tuners can be implementedusing any of a number of digital techniques, including for example, aDSP (DSP 668) with associated memory and program code. The output of DSP668 is converted to an analog signal by a digital-to-analog converter662 and provided to the multiplexer 663. Multiplexer 663 demultiplexesthe analog signal to separate the I and Q channels into separatesignals. In the illustrated example, the I channel is provided at thetop branch of the circuit and Q channel is provided at the bottom branchof the circuit. Hold circuit 667 is loaded with the value for the Isignal and the demultiplexer switches such that digital-to-analogconverter 662 provides the Q value to multiplexer 663. Multiplexer 663routes the Q value to the lower branch of the circuit. Now that both theI and Q values are present at the interface, they can be provided to thebaseband processor 660 by way of analog-to-digital converters 664.

In various embodiments, the hold circuit 667 can be placed in the Q arminstead of the I arm, or a hold circuit can be placed in both the I armand the Q arm. The DSP 668 (e.g., digital tuners and cross connections)can be further configured to provide interpolation to ensure correct Iand Q values, time aligned to the same instant of time. The hold circuitmay be configured to ensure that the value (in the illustrated examplethe I value) is held long enough for the Q value to be provided suchthat simultaneous sampling by the baseband I and Q analog-to-digitalconverters (e.g. analog-to-digital converters 664). In variousembodiments, the precision of the hold circuit is configured to beconsistent with the required resolution of the basebandanalog-to-digital converters. With this configuration, the I and Qsignals upon sampling by the analog-to-digital converters can be made toappear identical to two separate digital-to-analog converters (or othersources) driving the baseband analog-to-digital converters. In variousembodiments, the multiplexing rate is at least two times higher than thebaseband analog-to-digital converter sampling rate. This allows thevalues to be loaded in time for sampling.

The savings in circuit complexity, power consumption, and real estatecan be even more dramatic when implemented with a multichanneltransceiver such as, for example, a MIMO transceiver. FIG. 10 is adiagram illustrating an example of an implementation of the efficientinterface (e.g., such as that shown in FIG. 6) in a 4×4 MIMOconfiguration in accordance with one embodiment of the technologydisclosed herein. In this example, there are four transmit and receivepaths in this 4×4 MIMO configuration. Each of the transmit and receivepaths (e.g., each transmit/receive pair) in the transceiver 730 includesa single digital-to-analog converter 733, a single analog-to-digitalconverter 734, a hold circuit 735, switches 736, 737, and 738, andmultiplexers 731, 732. For clarity of illustration, reference charactersare included only on the topmost transmit/receive pair in FIG. 10. Alsofor clarity of illustration, receive signal path 742 and transmit signalpath 744 are illustrated only for the top and bottom transmit path andreceive path, respectively. After reading this description, one ofordinary skill in the art will appreciate that similar connections aremade between the digital-to-analog converter and multiplexer for theother receive paths and the multiplexer and analog-to-digital converterfor the other transmit paths.

Embodiments can be implemented that do not utilize a hold circuit.Particularly, in one embodiment, an additional digital-to-analogconverter can be provided at the output of the digital tuners to providethe I and Q signals on separate analog paths for sampling by thebaseband analog-to-digital converters. An example of this is illustratedat FIG. 11. For ease of understanding, as well as for ease of comparisonbetween FIG. 11 and FIG. 6, similar components are provided with thesame reference numbers. As seen in the example of FIG. 11, sample andhold module 431 and demultiplexer 432 have been eliminated and instead,an additional digital-to-analog converter 826 is provided. In thisembodiment, for receive operations, the I signal is routed throughdigital-to-analog converter 437 to baseband module 420 and the Q signalis routed by digital-to-analog converter 826 to baseband module 420. Inother embodiments, the I and Q signals can be reversed. This exampleembodiment eliminates the hold circuit by introducing a seconddigital-to-analog converter for one of the baseband ports. Reusing theoutput (RF) digital-to-analog converter 437 for the other basebandsignal still allow some efficiencies to be gained through reuse. Whilethe embodiment of FIG. 6 can save to analog-to-digital converters andtwo digital-to-analog converters per antenna, this embodiment saves toanalog-to-digital converters and one digital-to-analog converter perantenna.

As this example illustrates, transceiver 730 uses a total of eightanalog-to-digital and digital-to-analog converters for transmit andreceive operations for the 4×4 MIMO configuration. This can be comparedto solutions such as that shown in FIG. 4 in which transceiver 330 wouldrequire 24 analog-to-digital and digital-to-analog converters for a 4×4MIMO configuration. The example transceiver 730 shown in FIG. 10 canaccordingly provide in various embodiments a drop-in replacement for thesolution shown in FIG. 3. Accordingly, operations such as filtering,modulation and demodulation can be provided in digital form as comparedto the solution of FIG. 3, without requiring 16 additionaldigital-to-analog and analog-to-digital converters.

In accordance with other aspects of the technology disclosed herein,circuits, such as digital-to-analog converters, can also be shared intransmitters implementing digital dynamic bias control. In somecommunication systems, dynamic biasing of the transmitter poweramplifier (PA) may be implemented to improve transmitter efficiency.Dynamic biasing may be especially useful with applications requiringlinear amplification. Consider for example the IEEE 802.11 a/g/n/ac OFDMphysical layer. OFDM signals in general have an RF power exhibiting ahigh peak-to-average power ratio. This can often be around 13 dB (i.e.,20 times). Most of the time, the RF power is around the average power(RMS) by definition, with short (generally) excursions to higher andlower power levels.

FIG. 12 is a diagram illustrating an example of dynamic biasing inaccordance with one embodiment of the technology described herein. Inthis example, a modulator 902 and a digital tuner 904 are used tomodulate the data to be transmitted onto the appropriate carrier orcarriers. In the case of OFDM, multiple orthogonal carriers can be usedfor the physical layer of the communications interface.

The modulation in digital tuning can be done in the digital domain suchas, for example, using digital signal processors or other circuitry. Inthe embodiment illustrated in FIG. 12, the modulated signal from digitaltuner 904 is a digital signal. Digital-to-analog converter 908 convertsthe digital signal into an analog RF signal and sends it to the poweramplifier 910 to generate the amplified RF output.

For dynamic bias control, an envelope computation module 906 isincluded. Envelope computation module 906 computes the envelope of themodulated signal (digitally in this example) and uses this to the poweramplifier to control the bias. In some embodiments, envelope computationmodule 906 may be configured to track the envelope of the RF signal, andgenerate a bias signal to control the power amplifier so that it onlyuses as much power as needed to pass the signal and provide an outputwithin specification. In various embodiments, the envelope computationmodule 906 may be configured to compute the complement of the envelope,which may be used to reduce the digital-to-analog converter's 909dynamic range requirements.

In various embodiments, some margin may be built into the calculation toensure enough power is present. For digital applications such as the oneshown in FIG. 12, digital-to-analog converter 909 can convert thedigital signal into a bias current (Idd) that is provided to controlpower amplifier 910. As described above, the bias current Idd of poweramplifier 910 is controlled based on the envelope of the modulatedsignal. The higher the envelope, the higher the bias current Idd.Accordingly, the average power dissipation may be reduced.

As this example illustrates, a downside of this configuration is that aseparate digital-to--analog converter (DAC 909) is used to provide thebias current. For example, for a 160 MHz envelope, digital-to-analogconverter sampling at ≥320 MHz is required to provide the appropriateresolution. Note that an additional pin is also needed for theadditional output (two pins for differential signals).

In some embodiments of the technology disclosed herein a singledigital-to-analog converter can be used to provide the RF signal and thebias signal to the power amplifier. This can be done to avoid the needfor a separate digital-to-analog converter for the bias signal (e.g.digital-to-analog converter 909). FIG. 13 is a diagram illustrating anexample digital dynamic bias circuit including a shared DAC inaccordance with one embodiment of the technology disclosed herein.Referring now to FIG. 13, this example also includes a modulator 922 anddigital tuner 924 to provide modulation of the transmit signal onto anappropriate carrier. This example also includes an envelope computationmodule 926 to determine the envelope of the modulated signal and tocompute the bias control signal. In various embodiments, modulator 922,digital tuner 924, and envelope computation module 926 can beimplemented the same as or similar to modulator 902, digital tuner 904,and envelope computation module 906, as illustrated in the example ofFIG. 12.

This embodiment takes advantage of the fact that the RF signal and theenvelope are separated in frequency. In typical applications, the RFsignal and the envelope are sufficiently separated in frequency suchthat they can be combined without destructively interfering with oneanother. Accordingly, they may be combined and sent to the poweramplifier on the same line, and then they can be separated back out fromthe combined signal using filters. Therefore, as seen in the example ofFIG. 13, the envelope bias signal 929 and the modulated RF signal 925(both still in digital form) are combined using a combiner 927. Thecombined digital signal is converted to analog form by digital-to-analogconverter 928, producing a combined signal 930 including the modulatedRF signal 925 and the envelope bias signal 929. Because the signal iscombined, a single digital-to-analog converter may be used to convertthe signal to analog form. This combined signal 930 is sent to a highpass filter 932 and a low pass filter 934 to separate it out into itsconstituent components. High pass filter 932 effectively blocks (filtersout) the envelope signal, which is lower in frequency, and passes thehigher-frequency RF signal 933 to power amplifier 938. Similarly, lowpass filter 934 blocks or filters out the RF signal and passes theenvelope bias signal 935 as a bias control for power amplifier 938. Invarious embodiments, a signal is said to be filtered out by therespective filter if the filter sufficiently suppresses that signal(e.g., by a determined number of dB) so that the filtered out signaldoes not interfere with the operation of the transmitter. For example,the bias signal may be said to be filtered out of the combined signal bythe high pass filter 932 if the amount of interference caused by anyremaining bias signal at the output of the high pass filter 932 issufficiently small enough so as to not cause the system to operateoutside of its intended specifications. similarly, the modulated datasignal may be said to be filtered out of the combined signal by the lowpass filter 934 if the amount of interference caused by any remainingdata signal at the output of the low pass filter 934 is sufficientlysmall so as to not cause the system to operate outside of its intendedspecifications.

Typically, the envelope frequency spans the range from DC to the channelbandwidth. For WiFi as an example, the envelope is from DC to 160 MHz,while the RF is in the gigahertz range (e.g. 5.8 GHz). These differencesin frequency are easily separable using the diplexer as illustrated inFIG. 13 (i.e., the high pass filter/low pass filter combination).Although not shown in FIG. 13, an adaptive filter can be included toequalize the envelope bias signal with the RF signal 933 so that theyare time and amplitude aligned at power amplifier 938. An example ofthis is shown in FIG. 14.

FIG. 14 illustrates yet another example of dynamic bias in accordancewith one embodiment of the technology disclosed herein. Like the exampleof FIG. 13, the example of FIG. 14 includes a modulator 922, a digitaltuner 924, an envelope computation module 926, a combiner 927, adigital-to-analog converter 928, a high pass filter 932, and a poweramplifier 938. These components may be implemented using the same orsimilar components as described above with reference to FIG. 13. Thisexample further includes an adaptive filter module 993. In variousembodiments, the adaptive filter module 993 can be implemented toprovide equalization/matching of the envelope bias signal 929 to themodulated RF signal 925 output by digital tuner 924. In variousembodiments, adaptive filter module 993 can be implemented using, forexample, a digital signal processor.

In various embodiments, because the RF signal and the envelope signalare correlated (i.e. both may increase at the same time), the dynamicrange of digital-to-analog converter 928 can be high enough toaccommodate this correlated increase. For example, in some embodiments,digital-to-analog converter 928 can be specified to have an extra bit inthe effective number of bits (ENOB). In other embodiments, the envelopesignal combined with the RF signal can be a complement of the envelopeinstead of the envelope itself. For example, the system can send a1-e(t) normalized term instead of e(t) so that the envelope bias signaland the RF envelope signal are out of phase with one another. Therefore,when one is high, the other is low, and vice versa. As a result, anextra bit is not needed in the digital-to-analog converter 928. In suchembodiments, the low pass filter module 968 can be expanded to includebias conditioning, which can be configured to extract the originalenvelope for the modulated data signal, e(t), to ensure that theenvelope bias is in phase with, or substantially in phase with, the RFsignal.

In TDD systems, switches 912, 913 can be included to switch betweentransmit and receive modes for the transceiver. Switch 912 can beincluded to communicatively couple the antenna 919 to power amplifier938 for transmit operations, or to low noise amplifier 944 for receiveoperations. Switch 913 can be closed during transmit operations to allowthe receive path to provide a return path 914 for purposes of trainingthe adaptive filter. This same path 914 can be used to measure thesignal distortion and perform pre-distortion in a DSP to improve theoutput signal quality. For example, this can be used to improve EVM,reduce nonlinear distortion and have channel emissions, and so on.

For receive operations, switch 912 is switched to connect antenna 919 tolow noise amplifier 944, and switch 913 is opened. Analog-to-digitalconverter 996 digitizes signals on path 914 for digital demodulation bydemodulator 997 or for operation by adaptive filter module 993.

As noted above, adaptive filter module 993, can be implemented using adigital signal processor. In various embodiments, other componentsoperating in the digital domain in this and other embodiments may alsobe implemented using a DSP. In some embodiments, the digital, mixedsignal, and analog (i.e. RF/PA) can be implemented using a monolithicmodule, a multichip module, or separate components in separate packages.

While various embodiments of the disclosed technology have beendescribed above, it should be understood that they have been presentedby way of example only, and not of limitation. Likewise, the variousdiagrams may depict an example architectural or other configuration forthe disclosed technology, which is done to aid in understanding thefeatures and functionality that can be included in the disclosedtechnology. The disclosed technology is not restricted to theillustrated example architectures or configurations, but the desiredfeatures can be implemented using a variety of alternative architecturesand configurations. Indeed, it will be apparent to one of skill in theart how alternative functional, logical or physical partitioning andconfigurations can be implemented to implement the desired features ofthe technology disclosed herein. Also, a multitude of differentconstituent module names other than those depicted herein can be appliedto the various partitions. Additionally, with regard to flow diagrams,operational descriptions and method claims, the order in which the stepsare presented herein shall not mandate that various embodiments beimplemented to perform the recited functionality in the same orderunless the context dictates otherwise.

Although the disclosed technology is described above in terms of variousexemplary embodiments and implementations, it should be understood thatthe various Features, aspects and functionality described in one or moreof the individual embodiments are not limited in their applicability tothe particular embodiment with which they are described, but instead canbe applied, alone or in various combinations, to one or more of theother embodiments of the disclosed technology, whether or not suchembodiments are described and whether or not such features are presentedas being a part of a described embodiment. Thus, the breadth and scopeof the technology disclosed herein should not be limited by any of theabove-described exemplary embodiments.

Terms and phrases used in this document, and variations thereof, unlessotherwise expressly stated, should be construed as open ended as opposedto limiting. As examples of the foregoing: the term “including” shouldbe read as meaning “including, without limitation” or the like; the term“example” is used to provide exemplary instances of the item indiscussion, not an exhaustive or limiting list thereof; the terms “a” or“an” should be read as meaning “at least one,” “one or more” or thelike; and adjectives such as “conventional,” “traditional,” “normal,”“standard,” “known” and terms of similar meaning should not be construedas limiting the item described to a given time period or to an itemavailable as of a given time, but instead should be read to encompassconventional, traditional, normal, or standard technologies that may beavailable or known now or at any time in the future. Likewise, wherethis document refers to technologies that would be apparent or known toone of ordinary skill in the art, such technologies encompass thoseapparent or known to the skilled artisan now or at any time in thefuture.

The presence of broadening words and phrases such as “one or more,” “atleast,” “but not limited to” or other like phrases in some instancesshall not be read to mean that the narrower case is intended or requiredin instances where such broadening phrases may be absent. The use of theterm “module” does not imply that the components or functionalitydescribed or claimed as part of the module are all configured in acommon package. Indeed, any or all of the various components of amodule, whether control logic or other components, can be combined in asingle package or separately maintained and can further be distributedin multiple groupings or packages or across multiple locations.

Additionally, the various embodiments set forth herein are described interms of exemplary block diagrams, flow charts and other illustrations.As will become apparent to one of ordinary skill in the art afterreading this document, the illustrated embodiments and their variousalternatives can be implemented without confinement to the illustratedexamples. For example, block diagrams and their accompanying descriptionshould not be construed as mandating a particular architecture orconfiguration.

1-26. (canceled)
 27. A system comprising: a digital envelope detectoroperable to generate a digital bias according to a digital signal; adigital-to-analog converter (DAC) operable to generate a biased analogsignal according to the digital signal and the digital bias; a poweramplifier operable to generate an amplifier output according to anamplifier input and an amplifier control; a high pass filter operable toattenuate an analog bias of the biased analog signal to generate theamplifier input; and a low pass filter operable to pass the analog biasof the biased analog signal to generate the amplifier control.
 28. Thesystem of claim 27, wherein the control input of the power amplifier isoperable to control a bias of the power amplifier.
 29. The system ofclaim 27, wherein the digital signal comprises a data signal modulatedon a carrier.
 30. The system of claim 27, wherein the DAC comprises adigital combiner.
 31. The system of claim 27, wherein the systemcomprises an adaptive filter operably coupled between the digitalenvelope detector and the DAC.
 32. The system of claim 31, wherein thesystem comprises a return path operably coupled to the amplifier output.33. The system of claim 32, wherein the return path comprises ananalog-to-digital converter (ADC).
 34. The system of claim 32, whereinan output of the ADC provides a training signal to the adaptive filter.35. The system of claim 31, wherein the adaptive filter is operable tomeasure a signal distortion and provide a pre-distortion.
 36. The systemof claim 27, wherein the system comprises a bias conditioner to extractan original envelope for a modulated data signal in accordance with aphase of the amplifier output.
 37. A method comprising: generating adigital bias according to an envelope of a digital signal; combining thedigital signal with the digital bias to generate a biased digitalsignal; converting, by a digital-to-analog converter (DAC), the biaseddigital signal into a biased analog signal, wherein the biased analogsignal comprises a high frequency analog modulated data signal and a lowfrequency analog envelope bias signal; separating the high frequencyanalog modulated data signal from the low frequency analog envelope biassignal; and amplifying, using a power amplifier, the high frequencyanalog modulated data signal by a gain determined according to the lowfrequency analog envelope bias signal.
 38. The method of claim 37,wherein the combining is performed using the DAC.
 39. The method ofclaim 37, wherein the separating comprises filtering out the lowfrequency analog envelope bias signal from the analog RF signal andpassing the high frequency analog modulated data signal to the poweramplifier for amplification.
 40. The method of claim 37, wherein theseparating comprises filtering out the high frequency analog modulateddata signal from the analog RF signal and passing the low frequencyanalog envelope bias signal to a control input of the power amplifier tocontrol the bias of the power amplifier.
 41. The method of claim 37,wherein the method comprises computing a complement of the envelope. 42.The method of claim 37, wherein the method comprises filtering, using anadaptive filter, the digital bias signal prior to combining it with thedigital RF signal.
 43. The method of claim 37, wherein the low frequencyanalog envelope bias signal is substantially in phase with the highfrequency analog modulated data signal at the power amplifier.
 44. Themethod of claim 37, wherein the method comprises: providing the highfrequency analog modulated data signal to an input of the poweramplifier; and providing the low frequency analog envelope bias signalto a control input of the power amplifier.
 45. The method of claim 37,wherein the method comprises pre-distorting, using an adaptive filter,the digital signal according to a measured signal distortion in theamplified high frequency analog modulated data signal.
 46. The method ofclaim 37, wherein the method comprises extracting, using a biasconditioner to, an original envelope for a modulated data signal inaccordance with a phase of the amplifier output.